4.2.10 Summary

• The machine consists of one or more logical processors.
• Each processor operates on tiles that it owns.
• A processor may own more than one tile.
• Processors may compute concurrently.
• Exchange of information between tiles is handled by the machine (WRAPPER) not by the application.

• Processors may be able to communicate very efficiently with each other using shared memory.
• An alternative communication mechanism based on a relatively simple inter-process communication API may be required.
• Shared memory may not necessarily obey sequential consistency, however some mechanism will exist for enforcing memory consistency.
• Memory consistency that is enforced at the hardware level may be expensive. Unnecessary triggering of consistency protocols should be avoided.
• Memory access patterns may need to either repetitive or highly pipelined for optimum hardware performance.

This generic model captures the essential hardware ingredients of almost all successful scientific computer systems designed in the last 50 years.

Copyright © 2006 Massachusetts Institute of Technology

Last update 2018-01-23